Samsung Electronics plans to complete the development of the advanced packaging technology '3D Cube-H' by early next year.

Samsung Electronics plans to complete the development of advanced packaging technology '3D Cube-H' by early next year. This technology stacks multiple chips vertically through hybrid bonding, with terminal spacing of about 6 μm, much smaller than the 25 μm of traditional TC bonding, aiming to increase connection density, reduce energy consumption, and optimize heat dissipation, primarily targeting ultra-high-performance AI chips.